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https://github.com/NohamR/Reclass.git
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444ba34fa3
- Add Fadec x86 disassembler with hover popup for FuncPtr/void Pointer nodes - Separate pointer symbol from address: // prefix, green comment coloring, independent hover/click zones (address triggers popup, symbol is passive) - Fix RVA margin and inline local offset for pointer-expanded vtable children using ptrBase field threaded through composition - Expand multi-select context menu with quick-convert, duplicate, copy address - Remove Edit Value from hex node context menu - Fix heatmap flickering on hex nodes (remove per-byte alternation) - Fix popup repositioning when moving mouse between lines - Truncate disasm popup to 6 lines with ... indicator - Add BUILD_UI_TESTS option to skip widget tests on headless CI - Add test_disasm with 35 test cases for disassembly and hex dump - Add KUSER_SHARED_DATA example .rcx file
114 lines
4.2 KiB
C
114 lines
4.2 KiB
C
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#ifndef FD_FADEC_ENC_H_
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#define FD_FADEC_ENC_H_
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#include <stddef.h>
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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FE_AX = 0x100, FE_CX, FE_DX, FE_BX, FE_SP, FE_BP, FE_SI, FE_DI,
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FE_R8, FE_R9, FE_R10, FE_R11, FE_R12, FE_R13, FE_R14, FE_R15,
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FE_IP = 0x120,
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FE_AH = 0x204, FE_CH, FE_DH, FE_BH,
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FE_ES = 0x300, FE_CS, FE_SS, FE_DS, FE_FS, FE_GS,
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FE_ST0 = 0x400, FE_ST1, FE_ST2, FE_ST3, FE_ST4, FE_ST5, FE_ST6, FE_ST7,
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FE_MM0 = 0x500, FE_MM1, FE_MM2, FE_MM3, FE_MM4, FE_MM5, FE_MM6, FE_MM7,
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FE_XMM0 = 0x600, FE_XMM1, FE_XMM2, FE_XMM3, FE_XMM4, FE_XMM5, FE_XMM6, FE_XMM7,
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FE_XMM8, FE_XMM9, FE_XMM10, FE_XMM11, FE_XMM12, FE_XMM13, FE_XMM14, FE_XMM15,
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FE_XMM16, FE_XMM17, FE_XMM18, FE_XMM19, FE_XMM20, FE_XMM21, FE_XMM22, FE_XMM23,
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FE_XMM24, FE_XMM25, FE_XMM26, FE_XMM27, FE_XMM28, FE_XMM29, FE_XMM30, FE_XMM31,
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FE_K0 = 0x700, FE_K1, FE_K2, FE_K3, FE_K4, FE_K5, FE_K6, FE_K7,
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FE_TMM0 = 0x800, FE_TMM1, FE_TMM2, FE_TMM3, FE_TMM4, FE_TMM5, FE_TMM6, FE_TMM7,
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} FeReg;
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typedef int64_t FeOp;
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/** Construct a memory operand. Unused parts can be set to 0 and will be
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* ignored. FE_IP can be used as base register, in which case the offset is
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* interpreted as the offset from the /current/ position -- the size of the
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* encoded instruction will be subtracted during encoding. scale must be 1, 2,
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* 4, or 8; but is ignored if idx == 0. **/
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#define FE_MEM(base,sc,idx,off) (INT64_MIN | ((int64_t) ((base) & 0xfff) << 32) | ((int64_t) ((idx) & 0xfff) << 44) | ((int64_t) ((sc) & 0xf) << 56) | ((off) & 0xffffffff))
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#define FE_NOREG ((FeReg) 0)
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/** Add segment override prefix. This may or may not generate prefixes for the
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* ignored prefixes ES/CS/DS/SS in 64-bit mode. **/
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#define FE_SEG(seg) ((uint64_t) (((seg) & 0x7) + 1) << 29)
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/** Do not use. **/
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#define FE_SEG_MASK 0xe0000000
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/** Overrides address size. **/
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#define FE_ADDR32 0x10000000
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/** Used together with a RIP-relative (conditional) jump, this will force the
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* use of the encoding with the largest distance. Useful for reserving a jump
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* when the target offset is still unknown; if the jump is re-encoded later on,
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* FE_JMPL must be specified there, too, so that the encoding lengths match. **/
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#define FE_JMPL 0x100000000
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#define FE_MASK(kreg) ((uint64_t) ((kreg) & 0x7) << 33)
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#define FE_RC_RN 0x0000000
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#define FE_RC_RD 0x0800000
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#define FE_RC_RU 0x1000000
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#define FE_RC_RZ 0x1800000
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enum {
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FE_CC_O = 0x0,
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FE_CC_NO = 0x1,
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FE_CC_C = 0x2,
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FE_CC_B = FE_CC_C,
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FE_CC_NAE = FE_CC_C,
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FE_CC_NC = 0x3,
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FE_CC_AE = FE_CC_NC,
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FE_CC_NB = FE_CC_NC,
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FE_CC_Z = 0x4,
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FE_CC_E = FE_CC_Z,
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FE_CC_NZ = 0x5,
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FE_CC_NE = FE_CC_NZ,
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FE_CC_BE = 0x6,
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FE_CC_NA = FE_CC_BE,
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FE_CC_A = 0x7,
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FE_CC_NBE = FE_CC_A,
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FE_CC_S = 0x8,
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FE_CC_NS = 0x9,
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FE_CC_P = 0xa,
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FE_CC_PE = FE_CC_P,
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FE_CC_NP = 0xb,
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FE_CC_PO = FE_CC_NP,
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FE_CC_L = 0xc,
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FE_CC_NGE = FE_CC_L,
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FE_CC_GE = 0xd,
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FE_CC_NL = FE_CC_GE,
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FE_CC_LE = 0xe,
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FE_CC_NG = FE_CC_LE,
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FE_CC_G = 0xf,
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FE_CC_NLE = FE_CC_G,
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};
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#include <fadec-encode-public.inc>
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/** Do not use. **/
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#define fe_enc64_1(buf, mnem, op0, op1, op2, op3, ...) fe_enc64_impl(buf, mnem, op0, op1, op2, op3)
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/** Encode a single instruction for 64-bit mode.
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* \param buf Pointer to the buffer for instruction bytes, must have a size of
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* 15 bytes. The pointer is advanced by the number of bytes used for
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* encoding the specified instruction.
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* \param mnem Mnemonic, optionally or-ed with FE_SEG(), FE_ADDR32, or FE_JMPL.
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* \param operands... Instruction operands. Immediate operands are passed as
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* plain value; register operands using the FeReg enum; memory operands
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* using FE_MEM(); and offset operands for RIP-relative jumps/calls are
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* specified as _address in buf_, e.g. (intptr_t) jmptgt, the address of
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* buf and the size of the encoded instruction are subtracted internally.
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* \return Zero for success or a negative value in case of an error.
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**/
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#define fe_enc64(buf, ...) fe_enc64_1(buf, __VA_ARGS__, 0, 0, 0, 0, 0)
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/** Do not use. **/
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int fe_enc64_impl(uint8_t** buf, uint64_t mnem, FeOp op0, FeOp op1, FeOp op2, FeOp op3);
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#ifdef __cplusplus
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}
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#endif
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#endif
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